Many applications performed on microprocessors or digital signal processors require the generation of addresses to fetch data from memory. One such application requires a finite portion of memory to appear as a circular buffer, such that data stored in a contiguous, finite portion of a memory array appears to be endless. The addressing technique used for circular buffers, known as modulo addressing, provides that an address stored in an address pointer will be incremented or decremented by a predetermined displacement for each memory access until a beginning or ending address boundary is reached or exceeded. When a beginning or ending address boundary is reached or exceeded, the address pointer for the next memory access will "wrap-around" to the other end of the address range of the finite array.
Known modulo addressing techniques are described in U.S. Pat. Nos. 5,623,621, 4,908,748, and 4,800,524 which are hereby incorporated by reference. Present modulo addressing techniques are designed to access memory for single-word fetches where the memory is one word wide such that each memory access is aligned with the word being fetched.
A need exists for a modulo addressing technique to accommodate multiple-word fetches, such as double-word fetches, where a single element of memory may hold more than one word. In such applications, the data may or may not be aligned.